Modern high-density integrated circuits (ICs) are known to be vulnerable to damage from electrostatic discharge (ESD) originating from an electrically charged body (human or otherwise) as the charged body physically contacts the IC. ESD damage occurs when the amount of charge exceeds the capability of the electrical conduction path through the IC. The typical ESD failure mechanisms include thermal runaway resulting in junction shorting, and dielectric breakdown resulting in gate-junction shorting in the metal-oxide-semiconductor (MOS) context.
An IC may be subjected to a damaging ESD event in the manufacturing process, during assembly, testing, or in the system application. In conventional IC ESD protection schemes, active clamp circuits are generally used to shunt ESD current between the power supply rails and thereby protect internal IC nodes that are connected to bond pads from ESD damage.
Conventional vertical NPN bipolar devices used for ESD cells for protection of various nodes on an IC typically include a surface n-type region (e.g., surface nwell) on an n+ vertical sinker diffusion that is on an n+ buried layer (NBL) which together provides a collector in one or more device stripes (or fingers) to provide a low resistance-path to carry ESD strike induced current back to the top surface (e.g., top of the surface nwell). In Bipolar Metal Oxide Semiconductor (BiMOS) technologies, it is a common practice to use such vertical NPN devices as the ESD protection circuitry.
In one known arrangement ESD clamp protection is provided by an NPN transistor in a CER configuration, where the NPN's collector terminal is coupled to receive the ESD strike, the emitter is grounded, and the base is tied to the emitter by a resistor referred to as a CER resistor. In this configuration, during a negative ESD strike the voltage developed across the CER resistor is used to turn on the emitter-base diode of the NPN transistor once the collector-base (pn) junction begins to go into impact ionization and avalanche breakdown during an ESD strike.